Wave-parallel computing (WPC) technique is proposed to address the interconnection problem in massively interconnected VLSI architectures required for implementing artificial neural networks. The fundamental concepts are frequency multiplexing of signals on a single line, and their wave-parallel processing without decomposition. This paper discusses the realization of a Hopfield-type fully connected neural network as an example, and shows that the WPC-based network exhibits much lower topological complexity compared with the original network. We also investigate the possible implementation of WPC based on the present MOS technology, and discuss the evaluation in terms of the degree of multiplexing and processing speed.
|ジャーナル||Proceedings of The International Symposium on Multiple-Valued Logic|
|出版ステータス||Published - 1996 1 1|
|イベント||Proceedings of the 1996 26th International Symposium on Multiple-Valued Logic - Santiago de Compostela, Spain|
継続期間: 1996 5 29 → 1996 5 31
ASJC Scopus subject areas
- コンピュータ サイエンス（全般）
- 数学 (全般)