Vertex Channel Array Transistor (VCAT) featuring sub-60nm high performance and highly manufacturable trench capacitor DRAM

M. Kito, R. Katsumata, M. Kondo, S. Ito, K. Miyano, M. Kido, H. Yasutake, Y. Nagata, N. Aoki, H. Aochi, Akihiro Nitayama

研究成果: Conference article査読

3 被引用数 (Scopus)

抄録

Novel vertex channel array transistor (VCAT) fabricated on bulk silicon substrate is applied to trench capacitor DRAM cell for the first time. VCAT utilizes the vertexes as channel between top surface and (111) facet of selective epitaxial Si on active areas. It can be fabricated with much simpler process than FIN array transistor reported previously and fit to the process integration of trench capacitor DRAM cell. Almost 2 times higher on-current, smaller sub-threshold swing and less body effect than a conventional planar array transistor are demonstrated.

本文言語English
論文番号1469200
ページ(範囲)32-33
ページ数2
ジャーナルDigest of Technical Papers - Symposium on VLSI Technology
2005
DOI
出版ステータスPublished - 2005 12 1
イベント2005 Symposium on VLSI Technology - Kyoto, Japan
継続期間: 2005 6 142005 6 14

ASJC Scopus subject areas

  • 電子工学および電気工学

フィンガープリント

「Vertex Channel Array Transistor (VCAT) featuring sub-60nm high performance and highly manufacturable trench capacitor DRAM」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル