Two-dimensional device simulation for avalanche induced short channel effect in poly-Si TFT

So Yamada, Shin Yokoyama, Mitsumasa Koyanagi

研究成果: Conference article査読

20 被引用数 (Scopus)

抄録

A novel two-dimensional device simulator for poly-Si TFTs (thin-film transistors) is developed, in which the effects of grain boundaries (GBs) are incorporated into the carrier mobility model. In this simulator, the basic semiconductor equations are iteratively solved in combination with the carrier generation/recombination model, which consists of avalanche, S-R-H, and Auger processes. By using this simulator, the effects of GBs on device characteristics are accurately evaluated. In addition, the avalanche-induced short channel effect in poly-Si TFTs is numerically analyzed.

本文言語English
ページ(範囲)859-862
ページ数4
ジャーナルTechnical Digest - International Electron Devices Meeting
出版ステータスPublished - 1990 12 1
イベント1990 International Electron Devices Meeting - San Francisco, CA, USA
継続期間: 1990 12 91990 12 12

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 凝縮系物理学
  • 電子工学および電気工学
  • 材料化学

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