The influence of interconnect line patterns using flat-surface and low-dielectric-loss material under high speed signal propagation

M. Sugimura, H. Imai, M. Nakayama, M. Kawasaki, M. Fujimura, H. Oonuki, O. Kawashima, A. Morimoto, A. Teramoto, S. Sugawa, T. Ohmi

研究成果: Conference contribution

3 被引用数 (Scopus)

抄録

As increasing of requirements such as large number of input/output (I/O) and high operation frequency on semiconductor chips, high density, high speed and low power consumption are required for semiconductor package. [1] In order to meet those requirements, we developed 1) low dielectric and low dielectric loss tangent (tan8) material (lowΚ material), 2) Cu line formation technology on flat surface of insulation layer. [2] Based on those technologies, we have developed new low-Κ material and have evaluated its properties. We measured signal propagation delay of test substrate based on new low-Κ material with 50ω microstrip line and confirm it showed half of signal propagation loss and 1/4 of signal propagation variation in those of current materials. We also confirm significant difference in variation of characteristic impedance and signal transmission by time domain reflectometry (TDR) and time domain transmission (TDT). Other than those evaluations, we also measured power consumption and signal transmission property with 100ω microstrip line. We confirm developed low-Κ material show lower power consumption and variation than those of current materials and conclude that developed low-Κ material can be used for 100ω design providing lower power consumption. Furthermore, in order to evaluate influence by line designs, we made 50ω microstrip line with bending points and confirm very little influence by those micro line designs. We also confirm that obtained experimental results match with RLGC model considering skin effect and calculate breakdown of signal propagation loss by the RLGC model. This calculation show line formation technology on flat surface significantly reduce signal propagation loss, therefore, we conclude that flat surface of substrate as well as low dielectric constant and loss tangent are important. From this study, we conclude that line formation technology on flat surface, low dielectric and low loss material greatly contribute to high density, high speed and low power consumption of semiconductor package.

本文言語English
ホスト出版物のタイトルProceedings - 57th Electronic Components and Technology Conference 2007, ECTC '07
ページ1714-1719
ページ数6
DOI
出版ステータスPublished - 2007 10 22
イベント57th Electronic Components and Technology Conference 2007, ECTC '07 - Sparks, NV, United States
継続期間: 2007 5 292007 6 1

出版物シリーズ

名前Proceedings - Electronic Components and Technology Conference
ISSN(印刷版)0569-5503

Other

Other57th Electronic Components and Technology Conference 2007, ECTC '07
国/地域United States
CitySparks, NV
Period07/5/2907/6/1

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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