The flexible processor an approach for single-chip hardware emulation by dynamic reconfiguration

Takeshi Ohkawa, Toshiyuki Nozawa, Masanori Fujibayashi, Naoto Miyamoto, Karnan Leo, Soichiro Kita, Koji Kotani, Tadahiro Ohmi

研究成果: Paper査読

抄録

A dynamically reconfigurable logic array, i.e., the Flexible Processor, suitable for a single chip emulation system is developed. It demonstrates the sequential execution of several sub-circuits divided temporally from an original large circuit. In order to accelerate emulation speed, a logic element, reducing total configuration data by 30% compared to conventional Look-Up-Table, and Temporal Communication Module (TCM) to support save/restore of circuit state and data communication among divided sub-circuits, are implemented on the Flexible Processor.

本文言語English
ページ557-558
ページ数2
出版ステータスPublished - 2004 6月 1
イベントProceedings of the ASP - DAC 2004 Asia and South Pacific Design Automation Conference - 2004 - Yokohama, Japan
継続期間: 2004 1月 272004 1月 30

Other

OtherProceedings of the ASP - DAC 2004 Asia and South Pacific Design Automation Conference - 2004
国/地域Japan
CityYokohama
Period04/1/2704/1/30

ASJC Scopus subject areas

  • コンピュータ サイエンスの応用
  • コンピュータ グラフィックスおよびコンピュータ支援設計
  • 電子工学および電気工学

フィンガープリント

「The flexible processor an approach for single-chip hardware emulation by dynamic reconfiguration」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル