SET can achieve high performance without precise photolithography and metallization techniques. An arsenic doped polycrystalline silicon is used as a part of the emitter electrode in the SET structure. It is processed to have an inverse trapezoid shape. Procedure to make the inverse trapezoid shape uses a difference of etching rates between double layers of polycrystalline silicon. Base contact windows are opened through the ion-implantation process followed by chemical etching. The cut off frequency is about 8. 4 GHz. This frequency is higher than that of the conventional planar transistors with equal size emitter by 2 GHz.
|出版ステータス||Published - 1977 1 1|
|イベント||Proc Conf Solid State Devices 8th - Tokyo, Jpn|
継続期間: 1976 9 1 → 1976 9 3
|Other||Proc Conf Solid State Devices 8th|
|Period||76/9/1 → 76/9/3|
ASJC Scopus subject areas