Spintronics-based nonvolatile logic-in-memory architecture towards an ultra-low-power and highly reliable VLSI computing paradigm

Takahiro Hanyu, Daisuke Suzuki, Naoya Onizawa, Shoun Matsunaga, Masanori Natsui, Akira Mochizuki

研究成果: Conference contribution

20 被引用数 (Scopus)

抄録

Novel logic-LSI architecture, called 'spintronics-based nonvolatile logic-in-memory (NV-LIM) architecture,' where nonvolatile spintronic storage elements are distributed over a logic-circuit plane, is proposed as a promising candidate to overcome performance wall and power wall due to the present CMOS-only-based logic-LSIs. Some concrete design examples based on the NV-LIM architecture are demonstrated and their usefulness is discussed in comparison with the corresponding CMOS-only-based realization.

本文言語English
ホスト出版物のタイトルProceedings of the 2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015
出版社Institute of Electrical and Electronics Engineers Inc.
ページ1006-1011
ページ数6
ISBN(電子版)9783981537048
出版ステータスPublished - 2015 4 22
イベント2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015 - Grenoble, France
継続期間: 2015 3 92015 3 13

出版物シリーズ

名前Proceedings -Design, Automation and Test in Europe, DATE
2015-April
ISSN(印刷版)1530-1591

Other

Other2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015
国/地域France
CityGrenoble
Period15/3/915/3/13

ASJC Scopus subject areas

  • 工学(全般)

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