TY - JOUR
T1 - Silicate reaction control at lanthanum oxide and silicon interface for equivalent oxide thickness of 0.5 nm
T2 - Adjustment of amount of residual oxygen atoms in metal layer
AU - Kitayama, Daisuke
AU - Kubota, Toru
AU - Koyanagi, Tomotsune
AU - Kakushima, Kuniyuki
AU - Ahmet, Parhat
AU - Tsutsui, Kazuo
AU - Nishiyama, Akira
AU - Sugii, Nobuyuki
AU - Natori, Kenji
AU - Hattori, Takeo
AU - Iwai, Hiroshi
PY - 2011/10
Y1 - 2011/10
N2 - A guideline to select appropriate gate electrode materials to achieve an equivalent oxide thickness (EOT) of 0.5 nm with La2O3 gate dielectric has been proposed. The key parameter includes the adjustment of the amount of supplied oxygen atoms, which trigger the formation of the silicate layer at the interface, by selecting a metal with moderate free energy of oxygen. In addition, the thickness of the metal gate has been found to play an important role in silicate formation. Based on this guideline, an EOT of 0.5 nm with 3.5 nm La2O3 and 6 nm W gate electrode annealed at 800 °C was achieved. The hysteresis and humps in the capacitance voltage characteristics have been explained by the defect energy levels in the formed silicates and located at the interface with La2O3. The flat-band voltage shift correlated with the thickness of the oxygen-containing metal indicates the existence of fixed charges induced by the gate electrode metal. Finally, an appropriate transistor operation at an EOT of 0.5 nm has been confirmed.
AB - A guideline to select appropriate gate electrode materials to achieve an equivalent oxide thickness (EOT) of 0.5 nm with La2O3 gate dielectric has been proposed. The key parameter includes the adjustment of the amount of supplied oxygen atoms, which trigger the formation of the silicate layer at the interface, by selecting a metal with moderate free energy of oxygen. In addition, the thickness of the metal gate has been found to play an important role in silicate formation. Based on this guideline, an EOT of 0.5 nm with 3.5 nm La2O3 and 6 nm W gate electrode annealed at 800 °C was achieved. The hysteresis and humps in the capacitance voltage characteristics have been explained by the defect energy levels in the formed silicates and located at the interface with La2O3. The flat-band voltage shift correlated with the thickness of the oxygen-containing metal indicates the existence of fixed charges induced by the gate electrode metal. Finally, an appropriate transistor operation at an EOT of 0.5 nm has been confirmed.
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U2 - 10.1143/JJAP.50.10PA05
DO - 10.1143/JJAP.50.10PA05
M3 - Article
AN - SCOPUS:80054925053
SN - 0021-4922
VL - 50
JO - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
JF - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes
IS - 10 PART 2
ER -