Scalability of spin field programmable gate arrary: A reconfigurable architecture based on spin metal-oxide-semiconductor field effect transistor

Tetsufumi Tanamoto, Hideyuki Sugiyama, Tomoaki Inokuchi, Takao Marukame, Mizue Ishikawa, Kazutaka Ikegami, Yoshiaki Saito

研究成果: Article査読

17 被引用数 (Scopus)

抄録

The scalability of a field programmable gate array (FPGA) using a spin metal-oxide-semiconductor field effect transistor (MOSFET) (spin FPGA) with a magnetocurrent (MC) ratio in the range of 100-1000 is discussed for the first time. The area and speed of million-gate spin FPGAs are numerically benchmarked with CMOS FPGA for 22, 32, and 45 nm technologies including a 20 transistor size variation. We show that the area is reduced and the speed is increased in spin FPGA due to the nonvolatile memory function of spin MOSFET.

本文言語English
論文番号07C312
ジャーナルJournal of Applied Physics
109
7
DOI
出版ステータスPublished - 2011 4 1
外部発表はい

ASJC Scopus subject areas

  • 物理学および天文学(全般)

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