Real/complex reconfigurable arithmetic using redundant complex number systems

Takafumi Aoki, Hiroaki Amada, Tatsuo Higuchi

研究成果: Paper査読

15 被引用数 (Scopus)

抄録

This paper presents a hardware algorithm for a real/complex reconfigurable arithmetic unit, which can change its structure for three different arithmetic, modes in real time. The three modes realize (i) a single-precision complex-number multiplication, (ii) a double-precision real-number multiplication, and (iii) a pair of single-precision real-number four-operand multiply-add operations, respectively. We discuss the reconfiguration of hardware structure on the basis of the transformation of the number system used in each arithmetic mode. The designed arithmetic unit can perform high-speed real/complex arithmetic computations based on binary-tree addition scheme, and also exhibits highly regular structure suited for VLSI implementation.

本文言語English
ページ200-207
ページ数8
出版ステータスPublished - 1997 1 1
イベントProceedings of the 1997 13th IEEE Symposium on Computer Arithmetic - Asilomar, CA, USA
継続期間: 1997 7 61997 7 9

Other

OtherProceedings of the 1997 13th IEEE Symposium on Computer Arithmetic
CityAsilomar, CA, USA
Period97/7/697/7/9

ASJC Scopus subject areas

  • ソフトウェア
  • 理論的コンピュータサイエンス
  • ハードウェアとアーキテクチャ

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