Post-si nano device technology

Kazuhiko Endo

研究成果: Conference contribution

抄録

Ge is one of the promising candidates for use as high mobility channels in future CMOS device. The mobility of an electron and a hole is much higher in the Ge channel than in the Si channel. On the other hand, for 10-nm-node CMOS and beyond, a multi-gate fin structure is utilized to maintain electrostatic controllability of the gate electrode. The Ge FinFET is generally fabricated by Ge epitaxial growth from a SiGe/Si substrate [1] and conventional top-down etching by a plasma etching [2]. Usually, fin structure formation in Ge Fin FETs is carried out by using ICP (inductively coupled plasma) sources. However, ICP sources cause plasma induced damages owing to the ultraviolet (UV) light generated from the ICP and charging-up phenomena by the irradiation of ionized atoms. One concern is that such etching damage reduces the performance and reliability of Ge-channel CMOS. In this work, to break-through these plasma-induced damages, we demonstrated defect-free and highly anisotropic Ge etching for Ge FinFET fabricated by C1 neutral beam etching [3].

本文言語English
ホスト出版物のタイトルProceedings - 2019 IEEE 13th International Conference on ASIC, ASICON 2019
編集者Fan Ye, Ting-Ao Tang
出版社IEEE Computer Society
ISBN(電子版)9781728107356
DOI
出版ステータスPublished - 2019 10
外部発表はい
イベント13th IEEE International Conference on ASIC, ASICON 2019 - Chongqing, China
継続期間: 2019 10 292019 11 1

出版物シリーズ

名前Proceedings of International Conference on ASIC
ISSN(印刷版)2162-7541
ISSN(電子版)2162-755X

Conference

Conference13th IEEE International Conference on ASIC, ASICON 2019
CountryChina
CityChongqing
Period19/10/2919/11/1

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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