TY - GEN
T1 - Performance limit of parallel electric field tunnel FET and improvement by modified gate and channel configurations
AU - Morita, Y.
AU - Mori, T.
AU - Migita, S.
AU - Mizubayashi, W.
AU - Tanabe, A.
AU - Fukuda, K.
AU - Matsukawa, T.
AU - Endo, Kazuhiko
AU - O'uchi, S.
AU - Liu, Y. X.
AU - Masahara, M.
AU - Ota, H.
PY - 2013/1/1
Y1 - 2013/1/1
N2 - The performance of parallel electric field tunnel field-effect transistors (TFETs), in which band-to-band tunneling (BTBT) was initiated in-line to the gate electric field, was evaluated. The TFET was fabricated by inserting a parallel-plate tunnel capacitor between heavily doped source wells and gate insulators. Analysis using a distributed-element circuit model indicated there should be a limit of the drain current caused by the self-voltage-drop effect in the ultrathin channel layer. We also propose a scheme to improve the performance of the TFETs by modification of the gate and channel configurations.
AB - The performance of parallel electric field tunnel field-effect transistors (TFETs), in which band-to-band tunneling (BTBT) was initiated in-line to the gate electric field, was evaluated. The TFET was fabricated by inserting a parallel-plate tunnel capacitor between heavily doped source wells and gate insulators. Analysis using a distributed-element circuit model indicated there should be a limit of the drain current caused by the self-voltage-drop effect in the ultrathin channel layer. We also propose a scheme to improve the performance of the TFETs by modification of the gate and channel configurations.
UR - http://www.scopus.com/inward/record.url?scp=84902191527&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84902191527&partnerID=8YFLogxK
U2 - 10.1109/ESSDERC.2013.6818815
DO - 10.1109/ESSDERC.2013.6818815
M3 - Conference contribution
AN - SCOPUS:84902191527
SN - 9781479906499
T3 - European Solid-State Device Research Conference
SP - 45
EP - 48
BT - ESSDERC 2013 - Proceedings of the 43rd European Solid-State Device Research Conference
PB - IEEE Computer Society
T2 - 43rd European Solid-State Device Research Conference, ESSDERC 2013
Y2 - 16 September 2013 through 20 September 2013
ER -