Performance boost using a new device structure design for SOI MOSFETs beyond 25nm node

W. Cheng, A. Teramoto, T. Ohmi

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

In this study, we model the device performance in ultra short-channel inversion- and accumulation-mode SOI MOSFETs beyond the 25nm node. The performance is obviously improved in accumulation mode SOI MOSFETs while device downscaling. Furthermore, we reveal the device design guideline for the short-channel accumulation mode SOI MOSFETs.

本文言語English
ホスト出版物のタイトルECS Transactions - 5th International Symposium on ULSI Process Integration
出版社Electrochemical Society Inc.
ページ349-355
ページ数7
6
ISBN(電子版)9781566775724
ISBN(印刷版)9781566775724
DOI
出版ステータスPublished - 2007
外部発表はい
イベント5th International Symposium on ULSI Process Integration - 212th ECS Meeting - Washington, DC, United States
継続期間: 2007 10月 72007 10月 12

出版物シリーズ

名前ECS Transactions
番号6
11
ISSN(印刷版)1938-5862
ISSN(電子版)1938-6737

Other

Other5th International Symposium on ULSI Process Integration - 212th ECS Meeting
国/地域United States
CityWashington, DC
Period07/10/707/10/12

ASJC Scopus subject areas

  • 工学(全般)

引用スタイル