TY - JOUR
T1 - Optimization of vertical interconnection in 3D LSI using wire-length distribution
AU - Nakamura, T.
AU - Yamada, Y.
AU - Ono, T.
AU - Shim, J. C.
AU - Kurino, H.
AU - Koyanagi, M.
PY - 2003
Y1 - 2003
N2 - In this paper, the model for wire length distribution model in three dimensional LSI is derived using Rent's rule. The number of the vertical interconnections and the ratio in all of wirings can be calculated with this model. This model clearly shows that many vertical interconnections are effectively utilized in chips with high Rent's constant p. We also evaluate the vertical interconnection density and the occupied area by the vertical interconnection in a chip.
AB - In this paper, the model for wire length distribution model in three dimensional LSI is derived using Rent's rule. The number of the vertical interconnections and the ratio in all of wirings can be calculated with this model. This model clearly shows that many vertical interconnections are effectively utilized in chips with high Rent's constant p. We also evaluate the vertical interconnection density and the occupied area by the vertical interconnection in a chip.
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M3 - Conference article
AN - SCOPUS:21644433279
SN - 1540-1766
SP - 35
EP - 43
JO - Advanced Metallization Conference (AMC)
JF - Advanced Metallization Conference (AMC)
T2 - Advanced Metallization Conference 2003, AMC 2003
Y2 - 21 October 2003 through 23 October 2003
ER -