Neuromorphic vision chip fabricated using three-dimensional integration technology

M. Koyanagi, Y. Nakagawa, K. W. Lee, T. Nakamura, Y. Yamada, K. Inamura, K. T. Park, H. Kurino

研究成果: Conference article査読

115 被引用数 (Scopus)

抄録

A neuromorphic vision chip with three dimesional structure was fabricated using three dimensional integration technology. The device wafer with buried interconnections was glued to the quartz glass and then thinned from the backside using mechanical grinding and chemical mechanical polishing (CMP). On the bottom of the buried interconnections on the backside, micro bumps were formed. The thinned wafer was glued to another wafer. The three dimensional stacked wafer was obtained by repeating this sequence.

本文言語English
ページ(範囲)270-271+454
ジャーナルDigest of Technical Papers - IEEE International Solid-State Circuits Conference
出版ステータスPublished - 2001
イベントDigest of Technical Papers - IEEE International Solid-State Circuits Conference -
継続期間: 2001 2月 52001 2月 6

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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