A logic-in-memory structure, in which storage functions are distributed over a logic-circuit plane, is described. This structure is perceived as a solution to the communication bottleneck between memory and logic modules. This logic-in memory VLSI based on floating-gate MOS transistors merges storage and switching functions in a multiple-valued-input and binary output combinational logic circuit that is useful for the realization of parallel arithmetic and logic circuits.
|ジャーナル||Digest of Technical Papers - IEEE International Solid-State Circuits Conference|
|出版ステータス||Published - 1998 1 1|
|イベント||Proceedings of the 1998 IEEE 45th International Solid-State Circuits Conference, ISSCC - San Francisco, CA, USA|
継続期間: 1998 2 5 → 1998 2 7
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering