Multiple-event-transient soft-error gate-level simulator for harsh radiation environments

Akira Mochizuki, Naoya Onizawa, Akira Tamakoshi, Takahiro Hanyu

研究成果: Conference contribution


A gate-level simulator considering a multiple-event transient (MET) is proposed to design soft-error resilient VLSI chips for harsh radiation environments. Single event transients (SETs) at several logic gates might occur independently during a clock cycle, causing a wrong pulse captured in a D-flip-flop (D-F/F). To investigate the MET influence, SET effects at each gate are precisely modelled in the proposed primitive cell library. The proposed MET model can program the following three parameters of soft-error pulse as 1) probability of pulse generation, 2) the pulse width, and 3) the pulse position during each internal cycle. Moreover, the probability of generating the wrong pulse, its width, and its position are individually decided at each primitive cell, so that multi-event pulse generations at a combinational circuit are performed. For example, typical benchmark circuits synthesized under a 90nm CMOS technology are simulated in the proposed cell library, and the soft-error effect due to circuit styles is evaluated in accordance with the variety of fault-injection rate. Several correct logical values captured at each D-F/F are generated in spite of false conditions on internal nodes. This proposed cell library for a soft-error simulator at the harsh radiation environments is effectively used to re-verify the existing fault-tolerant circuits such as an ECC.

ホスト出版物のタイトルTENCON 2015 - 2015 IEEE Region 10 Conference
出版社Institute of Electrical and Electronics Engineers Inc.
出版ステータスPublished - 2016 1 5
イベント35th IEEE Region 10 Conference, TENCON 2015 - Macau, Macao
継続期間: 2015 11 12015 11 4


名前IEEE Region 10 Annual International Conference, Proceedings/TENCON


Other35th IEEE Region 10 Conference, TENCON 2015

ASJC Scopus subject areas

  • コンピュータ サイエンスの応用
  • 電子工学および電気工学


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