MRAM writing circuitry to compensate for thermal variation of magnetization reversal current

Takeshi Honda; Noboru Sakimura; Tadahiko Sugibayashi; Hideaki Numata; Sadahiko Miura; Hiromitsu Hada; Shuichi Tahara

MRAM writing circuitry to compensate for thermal variation of magnetization reversal current

Takeshi Honda, Noboru Sakimura, Tadahiko Sugibayashi, Hideaki Numata, Sadahiko Miura, Hiromitsu Hada, Shuichi Tahara

研究成果: Article › 査読

抄録

MRAM-writing circuitry to compensate for the thermal variation of the magnetization-reversal current is proposed. The writing current of the proposed circuitry is designed to decrease in proportion to an increase in temperature. This technique prevents multiple-write failures from degrading 1 Gb MRAM yield where the standard deviation of magnetization-reversal current variation from other origins is less than 5%.

本文言語	English
ページ（範囲）	612-617
ページ数	6
ジャーナル	IEICE Transactions on Electronics
巻	E86-C
号	4
出版ステータス	Published - 2003 4月
外部発表	はい

ASJC Scopus subject areas

電子材料、光学材料、および磁性材料
電子工学および電気工学

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title = "MRAM writing circuitry to compensate for thermal variation of magnetization reversal current",

abstract = "MRAM-writing circuitry to compensate for the thermal variation of the magnetization-reversal current is proposed. The writing current of the proposed circuitry is designed to decrease in proportion to an increase in temperature. This technique prevents multiple-write failures from degrading 1 Gb MRAM yield where the standard deviation of magnetization-reversal current variation from other origins is less than 5%.",

keywords = "MRAM, Magnetization reversal current, Thermal variation compensation",

author = "Takeshi Honda and Noboru Sakimura and Tadahiko Sugibayashi and Hideaki Numata and Sadahiko Miura and Hiromitsu Hada and Shuichi Tahara",

year = "2003",

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language = "English",

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T1 - MRAM writing circuitry to compensate for thermal variation of magnetization reversal current

AU - Honda, Takeshi

AU - Sakimura, Noboru

AU - Sugibayashi, Tadahiko

AU - Numata, Hideaki

AU - Miura, Sadahiko

AU - Hada, Hiromitsu

AU - Tahara, Shuichi

PY - 2003/4

Y1 - 2003/4

N2 - MRAM-writing circuitry to compensate for the thermal variation of the magnetization-reversal current is proposed. The writing current of the proposed circuitry is designed to decrease in proportion to an increase in temperature. This technique prevents multiple-write failures from degrading 1 Gb MRAM yield where the standard deviation of magnetization-reversal current variation from other origins is less than 5%.

AB - MRAM-writing circuitry to compensate for the thermal variation of the magnetization-reversal current is proposed. The writing current of the proposed circuitry is designed to decrease in proportion to an increase in temperature. This technique prevents multiple-write failures from degrading 1 Gb MRAM yield where the standard deviation of magnetization-reversal current variation from other origins is less than 5%.

KW - MRAM

KW - Magnetization reversal current

KW - Thermal variation compensation

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M3 - Article

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JO - IEICE Transactions on Electronics

JF - IEICE Transactions on Electronics

IS - 4

ER -

MRAM writing circuitry to compensate for thermal variation of magnetization reversal current

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