Investigations of Cu filling in through-Si via holes using direct electroless plating on CVD-W

In order to realize low resistance through-Si via (TSV) electrodes, Cu electroplating is one of the most promising methods. However, with an increase of the aspect ratio of TSV, a formation of conductive seed layer prior to Cu electroplating is becoming more and more difficult. We propose an alternative approach using the electroless plating of Cu, which utilize displacement plating without catalyst. This method is effective for fabricating a low resistance TSV when combined with a barrier layer which is composed of tungsten (W). We found that an addition of Cl ions drastically suppressed the pinch-off at the entrance of the TSV, and it enabled conformal Cu deposition for high aspect ratio TSVs.