Investigation of n-channel triple-gate metal-oxide-semiconductor field-effect transistors on (100) silicon on insulator substrate

Kazuhiko Endo; Meishoku Masahara; Yongxun Liu; Takashi Matsukawa; Kenichi Ishii; Etsurou Sugimata; Hidenori Takashima; Hiromi Yamauchi; Eiichi Suzuki

doi:10.1143/JJAP.45.3097

Investigation of n-channel triple-gate metal-oxide-semiconductor field-effect transistors on (100) silicon on insulator substrate

Kazuhiko Endo, Meishoku Masahara, Yongxun Liu, Takashi Matsukawa, Kenichi Ishii, Etsurou Sugimata, Hidenori Takashima, Hiromi Yamauchi, Eiichi Suzuki

研究成果: Article › 査読

11 被引用数 (Scopus)

抄録

We have investigated the fabrication processes and device characteristics for n-channel triple-gate metal-oxide-semi-conductor field-effect transistors (MOSFETs) on (100) silicon-on-insulator substrates. By optimizing the diagonal ion implantation conditions for the narrow fin channel, the fabricated triple-gate device showed an electron mobility almost compatible to a planar MOSFET with a supreme subthreshold slope of 64mV/decade and drain induced barrier lowering DIBL of 15 mV/V

本文言語	English
ページ（範囲）	3097-3100
ページ数	4
ジャーナル	Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
巻	45
号	4 B
DOI	https://doi.org/10.1143/JJAP.45.3097
出版ステータス	Published - 2006 4月 25
外部発表	はい

ASJC Scopus subject areas

工学（全般）
物理学および天文学（全般）

文献へのアクセス

10.1143/JJAP.45.3097

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引用スタイル

Endo, K., Masahara, M., Liu, Y., Matsukawa, T., Ishii, K., Sugimata, E., Takashima, H., Yamauchi, H., & Suzuki, E. (2006). Investigation of n-channel triple-gate metal-oxide-semiconductor field-effect transistors on (100) silicon on insulator substrate. Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, 45(4 B), 3097-3100. https://doi.org/10.1143/JJAP.45.3097

Endo, K, Masahara, M, Liu, Y, Matsukawa, T, Ishii, K, Sugimata, E, Takashima, H, Yamauchi, H & Suzuki, E 2006, 'Investigation of n-channel triple-gate metal-oxide-semiconductor field-effect transistors on (100) silicon on insulator substrate', Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers, vol. 45, no. 4 B, pp. 3097-3100. https://doi.org/10.1143/JJAP.45.3097

@article{37890a3770c044dfb545e508be572d30,

title = "Investigation of n-channel triple-gate metal-oxide-semiconductor field-effect transistors on (100) silicon on insulator substrate",

abstract = "We have investigated the fabrication processes and device characteristics for n-channel triple-gate metal-oxide-semi-conductor field-effect transistors (MOSFETs) on (100) silicon-on-insulator substrates. By optimizing the diagonal ion implantation conditions for the narrow fin channel, the fabricated triple-gate device showed an electron mobility almost compatible to a planar MOSFET with a supreme subthreshold slope of 64mV/decade and drain induced barrier lowering DIBL of 15 mV/V",

keywords = "Dopant profile, Ion implantation, Mobility, Sub-threshold, Triple-gate",

author = "Kazuhiko Endo and Meishoku Masahara and Yongxun Liu and Takashi Matsukawa and Kenichi Ishii and Etsurou Sugimata and Hidenori Takashima and Hiromi Yamauchi and Eiichi Suzuki",

year = "2006",

month = apr,

day = "25",

doi = "10.1143/JJAP.45.3097",

language = "English",

volume = "45",

pages = "3097--3100",

journal = "Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes",

issn = "0021-4922",

publisher = "Japan Society of Applied Physics",

number = "4 B",

}

TY - JOUR

T1 - Investigation of n-channel triple-gate metal-oxide-semiconductor field-effect transistors on (100) silicon on insulator substrate

AU - Endo, Kazuhiko

AU - Masahara, Meishoku

AU - Liu, Yongxun

AU - Matsukawa, Takashi

AU - Ishii, Kenichi

AU - Sugimata, Etsurou

AU - Takashima, Hidenori

AU - Yamauchi, Hiromi

AU - Suzuki, Eiichi

PY - 2006/4/25

Y1 - 2006/4/25

N2 - We have investigated the fabrication processes and device characteristics for n-channel triple-gate metal-oxide-semi-conductor field-effect transistors (MOSFETs) on (100) silicon-on-insulator substrates. By optimizing the diagonal ion implantation conditions for the narrow fin channel, the fabricated triple-gate device showed an electron mobility almost compatible to a planar MOSFET with a supreme subthreshold slope of 64mV/decade and drain induced barrier lowering DIBL of 15 mV/V

AB - We have investigated the fabrication processes and device characteristics for n-channel triple-gate metal-oxide-semi-conductor field-effect transistors (MOSFETs) on (100) silicon-on-insulator substrates. By optimizing the diagonal ion implantation conditions for the narrow fin channel, the fabricated triple-gate device showed an electron mobility almost compatible to a planar MOSFET with a supreme subthreshold slope of 64mV/decade and drain induced barrier lowering DIBL of 15 mV/V

KW - Dopant profile

KW - Ion implantation

KW - Mobility

KW - Sub-threshold

KW - Triple-gate

UR - http://www.scopus.com/inward/record.url?scp=33646948796&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33646948796&partnerID=8YFLogxK

U2 - 10.1143/JJAP.45.3097

DO - 10.1143/JJAP.45.3097

M3 - Article

AN - SCOPUS:33646948796

VL - 45

SP - 3097

EP - 3100

JO - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes

JF - Japanese Journal of Applied Physics, Part 1: Regular Papers & Short Notes

SN - 0021-4922

IS - 4 B

ER -