InP MISFET's with Al203/Native Oxide Double-Layer Gate Insulators

Takayuki Sawada, Shin Itagaki, Hideki Hasegawa, Hideo Ohno

研究成果: Article査読

36 被引用数 (Scopus)

抄録

Enhancement-mode InP MISFET's with anodic AI2Q3/ native oxide double-layer for gate insulator are fabricated by anodization processes in electrolyte and in oxygen plasma. Such gate structure greatly improves the device performance; high effective electron mobilities of 1500–3000 cm2/V. s and marked reduction of drain current instability were simultaneously achieved. This device performance is consistent with the interface properties obtained by C-V measurements, InP MISFET inverters as well as ring oscillators are also fabricated to demonstrate the stability of the circuit at low frequency and to show the capability of the process employed.

本文言語English
ページ(範囲)1038-1043
ページ数6
ジャーナルIEEE Transactions on Electron Devices
31
8
DOI
出版ステータスPublished - 1984 8月
外部発表はい

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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