InP MISFET's with Al203/Native Oxide Double-Layer Gate Insulators

Takayuki Sawada, Shin Itagaki, Hideki Hasegawa, Hideo Ohno

研究成果: Article

33 引用 (Scopus)

抜粋

Enhancement-mode InP MISFET's with anodic AI2Q3/ native oxide double-layer for gate insulator are fabricated by anodization processes in electrolyte and in oxygen plasma. Such gate structure greatly improves the device performance; high effective electron mobilities of 1500–3000 cm2/V. s and marked reduction of drain current instability were simultaneously achieved. This device performance is consistent with the interface properties obtained by C-V measurements, InP MISFET inverters as well as ring oscillators are also fabricated to demonstrate the stability of the circuit at low frequency and to show the capability of the process employed.

元の言語English
ページ(範囲)1038-1043
ページ数6
ジャーナルIEEE Transactions on Electron Devices
31
発行部数8
DOI
出版物ステータスPublished - 1984 8
外部発表Yes

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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