A switched-current integrated circuit, which realizes the chaotic neuron model, is presented. The circuit mainly consists of CMOS inverters that are used as transconductance amplifiers and nonlinear elements. The chip was fabricated using a 1.2 μm HP CMOS process. A single neuron cell occupies only 0.0076mm2, which represents an area smaller than the one occupied by a standard bonding pad. The circuit operation was tested at a clock frequency of 2 MHz.
|ジャーナル||IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences|
|出版ステータス||Published - 1999 1 1|
ASJC Scopus subject areas
- Signal Processing
- Computer Graphics and Computer-Aided Design
- Electrical and Electronic Engineering
- Applied Mathematics