IC chip level low noise technology for high speed and high quality telecommunication systems

Masahiro Yamaguchi, Satoshi Tanaka, Yasushi Endo, Makoto Nagata, Hiroaki Matsui, Mizuki Iwanami, Kenta Tsukamoto

研究成果: Conference contribution

2 被引用数 (Scopus)

抄録

Single chip integration of RF frontend and digital backend circuits is an obvious solution to accommodate high sensitivity and selectivity of analogue RF chains, and the high speed and large data bandwidth digital processing in an RF IC for the coming wireless communication systems including long-term evolution-advanced (LTE-A) system. This paper firstly emphasizes the necessity to suppress intra electromagnetic coupling from digital to RF circuits within the bandwidth of wireless channels. Our approach to suppress IC chip level RF noise coupling and to estimate their impact on system-level performance of wireless communication lead to major achievements on; (a)development of an in-system diagnosis platform of RF ICs consisting of a silicon emulator of on-chip interferers and a system-level RF performance simulator, (b)measurement-based substrate noise coupling analysis, measurement-based magnetic air coupling analysis, (c)an unique ferromagnetic on-chip countermeasure, and (d)board level coupling analysis in LTE receiver communication band. Their impacts on future telecommunication systems are estimated to conclude this work.

本文言語English
ホスト出版物のタイトル2014 Asia-Pacific Microwave Conference Proceedings, APMC 2014
出版社Institute of Electrical and Electronics Engineers Inc.
ページ540-542
ページ数3
ISBN(電子版)9784902339314
出版ステータスPublished - 2014 3 25
イベント2014 Asia-Pacific Microwave Conference, APMC 2014 - Sendai, Japan
継続期間: 2014 11 42014 11 7

出版物シリーズ

名前2014 Asia-Pacific Microwave Conference Proceedings, APMC 2014

Other

Other2014 Asia-Pacific Microwave Conference, APMC 2014
CountryJapan
CitySendai
Period14/11/414/11/7

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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