Highly reliable multiple-valued circuit based on dual-rail differential logic

Akira Mochizuki, Takahiro Hanyu

研究成果: Conference contribution

5 被引用数 (Scopus)

抄録

A new multiple-valued circuit based on dual-rail differential logic is proposed for crosstalk noise reduction. Since a dual-rail complementary duplication is performed by using two differential-pair circuits (DPCs), noise effect is distributed to only one DPC, if common-mode, noise is applied to dual-rail input lines. The dual-rail complementary duplicated DPCs makes noise effect reduced, because one of the DPC makes error operation and the other makes no-error operation, so that the output noise level which is summed up of two DPCs becomes half. By using the Schmitt-trigger circuit, the half-level noise effect from two DPCs is almost eliminated. As a typical design example of arithmetic modules, it is discussed to implement a crosstalk-noise-free radix-2 signed-digit full adder in a 0.18μm CMOS technology at the supply voltage of 1.8V.

本文言語English
ホスト出版物のタイトル36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006
ページ数1
DOI
出版ステータスPublished - 2006 11 21
イベント36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006 - Singapore, Singapore
継続期間: 2006 5 172006 5 20

出版物シリーズ

名前Proceedings of The International Symposium on Multiple-Valued Logic
ISSN(印刷版)0195-623X

Other

Other36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006
国/地域Singapore
CitySingapore
Period06/5/1706/5/20

ASJC Scopus subject areas

  • コンピュータ サイエンス(全般)
  • 数学 (全般)

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