Highly Parallel Residue Arithmetic Chip Based on Multiple-Valued Bidirectional Current-Mode Logic

Michitaka Kameyama, Tatsuo Higuchi, Tsutomu Sekibe

研究成果: Article査読

14 被引用数 (Scopus)

抄録

This paper discusses the implementation of a residue arithmetic circuit using multiple-valued bidirectional current-mode MOS technology. Each residue digit is represented by new multiple-valued coding suitable for highly parallel computation. By the coding, mod mimultiplication can be simply performed by a shift operation. In mod addition, miradix-5 signed-digit (SD) arithmetic is employed for a high degree of parallelism and multiple-operand addition, so that high-speed arithmetic operations can be achieved. Finally, the mod7 three-operand multiply adder is designed and fabricated as an integrated circuit based on 10-μm CMOS technology.

本文言語English
ページ(範囲)1404-1411
ページ数8
ジャーナルIEEE Journal of Solid-State Circuits
24
5
DOI
出版ステータスPublished - 1989 10

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

フィンガープリント 「Highly Parallel Residue Arithmetic Chip Based on Multiple-Valued Bidirectional Current-Mode Logic」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル