Hardware-software co-design for efficient and scalable real-time emulation of SNNs on the edge

Josep Angel Oltra-Oltra, Bernardo Vallejo, Jordi Madrenas, Diana Mata-Hernandez, Mireya Zapata, Shigeo Sato

研究成果: Conference contribution

抄録

This paper introduces a novel workflow for Distributed Spiking Neural Network Architecture (DSNA). As such, the hardware implementation of Single Instruction Multiple Data (SIMD)-based Spiking Neural Network (SNN) requires the development of user-friendly and efficient toolchain in order to maximise the potential that the architecture brings. By using a novel SNN architecture, a custom designed hardware/software toolchain has been developed. The toolchain performance has been experimentally checked on a Band-Pass Filter (BPF), obtaining optimized code and data.

本文言語English
ホスト出版物のタイトル2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
出版社Institute of Electrical and Electronics Engineers Inc.
ISBN(電子版)9781728192017
DOI
出版ステータスPublished - 2021
イベント53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Daegu, Korea, Republic of
継続期間: 2021 5 222021 5 28

出版物シリーズ

名前Proceedings - IEEE International Symposium on Circuits and Systems
2021-May
ISSN(印刷版)0271-4310

Conference

Conference53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
国/地域Korea, Republic of
CityDaegu
Period21/5/2221/5/28

ASJC Scopus subject areas

  • 電子工学および電気工学

フィンガープリント

「Hardware-software co-design for efficient and scalable real-time emulation of SNNs on the edge」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル