Fully-filled, highly-reliable fine-pitch interposers with TSV aspect ratio >10 for future 3D-LSI/IC packaging

Murugesan Murugesan, Takafumi Fukushima, Kiyoharu Mori, Ai Nakamura, Yisang Lee, Makoto Motoyoshi, J. C. Bea, Shigeru Watariguchi, Mitsumasa Koyanagi

研究成果: Conference contribution

8 被引用数 (Scopus)

抄録

Si interposer with 10 μm-width, 100 μm-deep through-silicon via (TSV) has been fabricated using electroless (EL) Ni as barrier and seed layers, and characterized for their electrical resistance. The chemistry of electroless-Ni plating bath was meticulously adjusted for the conformal formation of Ni along the TSV side wall. From the resistance value of 36 ΩW per TSV obtained from the Kelvin measurement of these Cu-TSV chain showed that the electroless Ni layer well acts as a good seed layer for completely filling the high aspect ratio TSVs by Cu-electroplating.

本文言語English
ホスト出版物のタイトルProceedings - IEEE 69th Electronic Components and Technology Conference, ECTC 2019
出版社Institute of Electrical and Electronics Engineers Inc.
ページ1047-1051
ページ数5
ISBN(電子版)9781728114989
DOI
出版ステータスPublished - 2019 5
外部発表はい
イベント69th IEEE Electronic Components and Technology Conference, ECTC 2019 - Las Vegas, United States
継続期間: 2019 5 282019 5 31

出版物シリーズ

名前Proceedings - Electronic Components and Technology Conference
2019-May
ISSN(印刷版)0569-5503

Conference

Conference69th IEEE Electronic Components and Technology Conference, ECTC 2019
国/地域United States
CityLas Vegas
Period19/5/2819/5/31

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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