FeRAM retention analysis method based on memory cell read signal voltage measurement

H. Koike, K. Amanuma, T. Miwa, J. Yamada, H. Toyoshima

研究成果: Paper査読

4 被引用数 (Scopus)

抄録

A novel retention analysis method for ferroelectric random access memory (FeRAM) has been developed, in which read signal voltages from memory cells are measured. It employs on-chip sample/hold circuits, an off-chip A/D converter, and memory LSI testing equipment. FeRAM chip reliability is estimated on the basis of FeRAM read signal voltages after retention periods of 1 day and longer. When used as a tool to estimate long-term data retention in FeRAM chips, and when used to analyze fluctuations in FeRAM cell characteristics, this method can be of significant help in improving the reliability of FeRAM chips.

本文言語English
ページ37-41
ページ数5
出版ステータスPublished - 2001 1月 1
外部発表はい
イベントICMTS 2001. 2001 International Conference on Microelectronic Test Structures - Kobe, Japan
継続期間: 2001 3月 192001 3月 22

Other

OtherICMTS 2001. 2001 International Conference on Microelectronic Test Structures
国/地域Japan
CityKobe
Period01/3/1901/3/22

ASJC Scopus subject areas

  • 電子工学および電気工学

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