Fabrication Process and Device Characteristics of Sidewall Base Contact Structure Transistor Using Two-Step Oxidation of Sidewall Surface

Katsuyoshi Washio, Tohru Nakamura, Tetsuya Hayashida

研究成果: Article査読

2 被引用数 (Scopus)

抄録

A new bipolar process technology for sidewall base contact structure (SICOS) transistors and the effects of sidewall base contact width on device characteristics are described. The sidewall window width can be precisely controlled by utilizing the fabrication processes of the two-step oxidation of a sidewall surface (TOSS). Such a surface is made by using two-step etching of a silicon epitaxial layer and through the formation of two sidewall Si02and two sidewall Si3N4 layers. The key point in the TOSS processes is the optimization of the two sidewall Si3N4thicknesses. This is necessary to prevent the extension of the bird’s beak to the first sidewall Si02so that the sidewall w indow can be selectively opened and to prevent the generation of defects. This opening of the sidewall window is mainly controlled by the first etching depth of the silicon epitaxial layer. By applying the TOSS processes to a SICOS transistor, the sidewall window width can be controlled as desired. As a result, the dependences of breakdown voltage, junction capacitance, cutoff frequency, and switching speed on the sidewall window width are clarified.

本文言語English
ページ(範囲)1596-1600
ページ数5
ジャーナルIEEE Transactions on Electron Devices
35
10
DOI
出版ステータスPublished - 1988 10月
外部発表はい

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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