Fabrication of 0.1 μm mosfet with super self-aligned ultrashallow junction electrodes using selective si1-xgex CVD

Junichi Murota, M. Ishii, K. Goto, M. Sakuraba, T. Matsuura, Y. Kudoh, M. Koyanagi

研究成果: Conference contribution

4 被引用数 (Scopus)

抄録

Fabrication process of 0.1μm MOSFET's were developed with Super Self-aligned ultra-Shallow junction Electrode(S3EMOSFET) by utilizing in-situ impurity doped Si1-xGex selective epitaxy on the source/drain regions at 550°C by CVD. Normal saturation characteristics were observed and the threshold voltage scarcely showed a shift with the gate length, which means that the short channel effect is greatly suppressed in the S3EMOSFET. Further improvements of the current drivability were performed by annealing and selective tungsten growth. The results show very high potentials of this device for an ultrasmall MOSFET, because the effective channel length is almost the same as the fabricated gate length and the source/drain junctions are extremely shallow.

本文言語English
ホスト出版物のタイトルEuropean Solid-State Device Research Conference
編集者H. Grunbacher
出版社IEEE Computer Society
ページ376-379
ページ数4
ISBN(電子版)2863322214
DOI
出版ステータスPublished - 1997 1 1
イベント27th European Solid-State Device Research Conference, ESSDERC 1997 - Stuttgart, Germany
継続期間: 1997 9 221997 9 24

出版物シリーズ

名前European Solid-State Device Research Conference
ISSN(印刷版)1930-8876

Other

Other27th European Solid-State Device Research Conference, ESSDERC 1997
CountryGermany
CityStuttgart
Period97/9/2297/9/24

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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