Extended data retention characteristics after more than 104 write and erase cycles in EEPROMs

S. Aritome, R. Kirisawa, T. Endoh, R. Nakayama, R. Shirota, K. Sakui, K. Ohuchi, F. Masuoka

研究成果: Conference article査読

17 被引用数 (Scopus)

抄録

Improvements in data retention characteristics of a FETMOS cell which has a self-aligned double poly-Si stacked structure are discussed. The improvement results from the use of a uniform write and erase technology. Experiments show that gradual detrapping of electrons from the gate oxide to the substrate effectively suppresses data loss of the erased cell which stores positive charges in the floating gate. It is shown that a uniform write and uniform erase technology using Fowler-Nordheim tunneling current guarantees a wide cell threshold voltage window even after 106 write and erase cycles. This technology realizes a highly reliable EEPROM with extended data retention characteristics.

本文言語English
ページ(範囲)259-264
ページ数6
ジャーナルAnnual Proceedings - Reliability Physics (Symposium)
DOI
出版ステータスPublished - 1990
外部発表はい
イベントTwenty Eight International Reliability Physics Symposium 1990 - New Orleans, LA, USA
継続期間: 1990 3 271990 3 29

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

フィンガープリント 「Extended data retention characteristics after more than 10<sup>4</sup> write and erase cycles in EEPROMs」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル