Exploring a design space of 3-D stacked vector processors

Ryusuke Egawa, Jubee Tada, Hiroaki Kobayashi

研究成果: Conference contribution

抄録

Three dimensional (3-D) technologies have come under the spotlight to overcome limitations of conventional two dimensional (2-D) microprocessor implementations. However, the effect of 3-D integrations with vertical interconnects in future vector processors design is not well discussed yet. In this paper, aiming at exploring the design space of future vector processors, fine and coarse grain 3-D integrations that aggressively employ vertical interconnects are designed and evaluated.

本文言語English
ホスト出版物のタイトルSustained Simulation Performance 2012 - Proceedings of the Joint Workshop on High Performance Computing on Vector Systems, and Workshop on Sustained Simulation Performance
出版社Springer Science and Business Media, LLC
ページ35-49
ページ数15
ISBN(印刷版)9783642324536
DOI
出版ステータスPublished - 2013
イベントJoint Workshop on High Performance Computing on Vector Systems and 15th Workshop on Sustained Simulation Performance 2012 - Sendai, Japan
継続期間: 2012 3 12012 3 1

出版物シリーズ

名前Sustained Simulation Performance 2012 - Proceedings of the Joint Workshop on High Performance Computing on Vector Systems, and Workshop on Sustained Simulation Performance

Other

OtherJoint Workshop on High Performance Computing on Vector Systems and 15th Workshop on Sustained Simulation Performance 2012
CountryJapan
CitySendai
Period12/3/112/3/1

ASJC Scopus subject areas

  • Modelling and Simulation

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