Experimental study of tri-gate SOI-FinFET flash memory

Y. X. Liu, T. Kamei, T. Matsukawa, K. Endo, S. O'Uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, T. Hayashida, K. Sakamoto, A. Ogura, M. Masahara

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

It is well known that 3D channel devices, such as double-gate (DG) and tri-gate (TG) FinFETs, provide excellent short-channel effect (SCE) immunity. Thus, the scaled 3D channel FinFET flash memories with oxide-nitride-oxide (ONO) charge trapping layers have actively been developed [1-3]. Very recently, we have also developed floating-gate (FG) type SOI-FinFET flash memories [4-7]. In this paper, we report the experimental results of the FG type SOI-FinFET flash memories including gate structure dependent of Vt variability and SCE immunity. We also report the FinFET flash memories with split-gate and with an improved inter-poly dielectric (IPD) layer.

本文言語English
ホスト出版物のタイトル2012 IEEE International SOI Conference, SOI 2012
DOI
出版ステータスPublished - 2012 12 1
外部発表はい
イベント2012 IEEE International SOI Conference, SOI 2012 - Napa, CA, United States
継続期間: 2012 10 12012 10 4

出版物シリーズ

名前Proceedings - IEEE International SOI Conference
ISSN(印刷版)1078-621X

Other

Other2012 IEEE International SOI Conference, SOI 2012
国/地域United States
CityNapa, CA
Period12/10/112/10/4

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

フィンガープリント

「Experimental study of tri-gate SOI-FinFET flash memory」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル