Evolutionary graph generation system with transmigration capability for arithmetic circuit design

Nuofumi Homma, Tukufumi Aoki, Tutsuo Higuchi

研究成果: Conference contribution

4 被引用数 (Scopus)

抄録

This paper presents a novel graph-based evolutionary optimization technique called Evolutionary Graph Generation (EGG), and its application to the design of fast constant-coefficient multipliers using parallel counter-tree architecture. This paper also demonstrates that the evolution process of EGG can be accelerated by a simple operation, called transmigration, which is to import previously generated good solutions for creating the other solutions.

本文言語English
ホスト出版物のタイトルISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
出版社IEEE Computer Society
ページ171-174
ページ数4
ISBN(印刷版)0780366859, 9780780366855
出版ステータスPublished - 2001 1 1
イベント2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 - Sydney, NSW, Australia
継続期間: 2001 5 62001 5 9

出版物シリーズ

名前ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
5

Other

Other2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001
国/地域Australia
CitySydney, NSW
Period01/5/601/5/9

ASJC Scopus subject areas

  • ハードウェアとアーキテクチャ
  • 電子工学および電気工学
  • 電子材料、光学材料、および磁性材料

フィンガープリント

「Evolutionary graph generation system with transmigration capability for arithmetic circuit design」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル