Evolutionary graph generation system and its application to bit-serial arithmetic circuit synthesis

Makoto Motegi, Naofumi Homma, Takafumi Aoki, Tatsuo Higuchi

研究成果: Conference contribution

2 被引用数 (Scopus)

抄録

This paper presents an efficient graph-based evolutionary optimization technique called Evolutionary Graph Generation (EGG), and its application to the design of bit-serial arithmetic circuits, which frequently appear in real-time DSP architectures. The potential of the proposed approach is examined through experimental synthesis of bitserial constant-coefficient multipliers. A new version of the EGG system can generate the optimal bit-serial multipliers of 8-bit coefficients with a 100% success rate in 15 minutes on an average.

本文言語English
ホスト出版物のタイトルParallel Problem Solving from Nature - PPSN 2002 - 7th International Conference, Proceedings
編集者Juan Julian Merelo Guervos, Panagiotis Adamidis, Hans-Georg Beyer, Hans-Paul Schwefel, Jose-Luis Fernandez-Villacanas
出版社Springer Verlag
ページ831-840
ページ数10
ISBN(印刷版)3540441395
DOI
出版ステータスPublished - 2002
イベント7th International Conference on Parallel Problem Solving from Nature, PPSN 2002 - Granada, Spain
継続期間: 2002 9 72002 9 11

出版物シリーズ

名前Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
2439
ISSN(印刷版)0302-9743
ISSN(電子版)1611-3349

Other

Other7th International Conference on Parallel Problem Solving from Nature, PPSN 2002
国/地域Spain
CityGranada
Period02/9/702/9/11

ASJC Scopus subject areas

  • 理論的コンピュータサイエンス
  • コンピュータ サイエンス(全般)

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