Evaluation of shared DRAM for parallel processor system with shared memory

Hiroyuki Kurino, Keiichi Hirano, Taizo Ono, Mitsumasa Koyanagi

研究成果: Article査読

3 被引用数 (Scopus)

抄録

We describe a new multiport memory which is called Shared DRAM (SHDRAM) to overcome bus-bottle neck problem in parallel processor system with shared memory. The processors are directly connected to this SHDRAM without conventional common bus. The test chip with 32kbit memory cells is fabricated using a 1.5 μm CMOS technology. The basic operation is confirmed by the circuit simulation and experimental results. In addition, it is confirmed by the computer simulation that the system performance with SHDRAM is superior to that with conventional common buses.

本文言語English
ページ(範囲)2655-2660
ページ数6
ジャーナルIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
E81-A
12
出版ステータスPublished - 1998 1 1

ASJC Scopus subject areas

  • 信号処理
  • コンピュータ グラフィックスおよびコンピュータ支援設計
  • 電子工学および電気工学
  • 応用数学

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