@inproceedings{ffaaa53ed4d84ccaa6d9812ae4224cd1,
title = "Effects of metal layer insertion on EOT scaling in TiN/Metal/La 2O3/Si High-k gate stacks",
abstract = "Effects of a thin metal layer (W, Ta, or Mo) inserted at the interface between La2O3 high-k gate dielectric and TiN gate metal were studied. It was found that the inserted metal layer plays crucial role in determining the electrical characteristics of the TiN/Metal/La2O 3/Si gate stack. Our results show that EOT can be scaled to 0.5nm and below by inserting a W layer with optimum thickness at the interface between La2O3 high-k gate dielectric and the TiN gate metal.",
author = "P. Ahmet and D. Kitayama and T. Kaneda and T. Suzuki and T. Koyanagi and M. Kouda and M. Mamatrishat and T. Kawanago and K. Kakushima and K. Tsutsui and A. Nishiyama and N. Sugii and K. Natori and T. Hattori and H. Iwai",
year = "2011",
doi = "10.1149/13568873",
language = "English",
isbn = "9781566778633",
series = "ECS Transactions",
publisher = "Electrochemical Society Inc.",
number = "2",
pages = "305--308",
booktitle = "Silicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications",
edition = "2",
}