Effects of metal layer insertion on EOT scaling in TiN/Metal/La 2O3/Si High-k gate stacks

P. Ahmet, D. Kitayama, T. Kaneda, T. Suzuki, T. Koyanagi, M. Kouda, M. Mamatrishat, T. Kawanago, K. Kakushima, K. Tsutsui, A. Nishiyama, N. Sugii, K. Natori, T. Hattori, H. Iwai

研究成果: Conference contribution

抄録

Effects of a thin metal layer (W, Ta, or Mo) inserted at the interface between La2O3 high-k gate dielectric and TiN gate metal were studied. It was found that the inserted metal layer plays crucial role in determining the electrical characteristics of the TiN/Metal/La2O 3/Si gate stack. Our results show that EOT can be scaled to 0.5nm and below by inserting a W layer with optimum thickness at the interface between La2O3 high-k gate dielectric and the TiN gate metal.

本文言語English
ホスト出版物のタイトルSilicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications
出版社Electrochemical Society Inc.
ページ305-308
ページ数4
2
ISBN(電子版)9781607682134
ISBN(印刷版)9781566778633
DOI
出版ステータスPublished - 2011
外部発表はい

出版物シリーズ

名前ECS Transactions
番号2
35
ISSN(印刷版)1938-5862
ISSN(電子版)1938-6737

ASJC Scopus subject areas

  • 工学(全般)

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