Early-Stage Operation-Skipping Scheme for Low-Power Stochastic Image Processors

Daisaku Katagiri, Naoya Onizawa, Takahiro Hanyu

研究成果: Conference contribution

抄録

Stochastic computation that performs in probabilistic domain has been recently exploited for area-efficient hardware implementation, while it requires large number of bits to represent probabilities, increasing the switching activity and hence power dissipation. In this paper, an early-stage operation-skipping scheme, where stochastic computation is terminated at the early stage by monitoring the intermediate computation result, is introduced for low-power stochastic image processors. In case that the proposed scheme is applied in edge-detection processing as a typical example of image processing, a non-candidate pixel is predicted using a simple threshold detector before the completion of the stochastic edge-detection process. Once the pixel is found, the edge-detection process is stopped, eliminating the stochastic computation at the rest of bits. As a design example, a Robert's operator based stochastic edge detector is implemented using MATLAB. Based on the simulation results, a correlation between an output-image quality using a peak signal-to-noise ratio (PSNR) criteria and the reduction ratio of bits is discussed.

本文言語English
ホスト出版物のタイトルProceedings - 2015 IEEE 45th International Symposium on Multiple-Valued Logic, ISMVL 2015
出版社IEEE Computer Society
ページ109-114
ページ数6
ISBN(電子版)9781479917778
DOI
出版ステータスPublished - 2015 9 2
イベント45th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2015 - Waterloo, Canada
継続期間: 2015 5 182015 5 20

出版物シリーズ

名前Proceedings of The International Symposium on Multiple-Valued Logic
2015-September
ISSN(印刷版)0195-623X

Other

Other45th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2015
国/地域Canada
CityWaterloo
Period15/5/1815/5/20

ASJC Scopus subject areas

  • コンピュータ サイエンス(全般)
  • 数学 (全般)

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