Dynamic-storage-based logic-in-memory circuit and its application to a fine-grain pipelined system

Hiromitsu Kimura, Takahiro Hanyu, Michitaka Kameyama

研究成果: Article査読

1 被引用数 (Scopus)

抄録

A new logic-in-memory circuit is proposed for a fine-grain pipelined VLSI system. Dynamic-storage elements are distributed over a logic-circuit plane. A functional pass gate is a key component, where a linear summation and threshold function are merged compactly using charge-storage and charge-coupling effect with a DRAM-cell-based circuit structure. The use of dynamic logic based on pass-transistor network using functional pass gates makes it possible to realize any logic circuits compactly with small power dissipation. As a typical example, a 54-bit pipelined multiplier is implemented by using the proposed circuit technology. Its power dissipation and chip area are reduced to about 63 percent and 72 percent, respectively, in comparison with those of a corresponding binary CMOS implementation under 0.35-μm CMOS technology.

本文言語English
ページ(範囲)288-296
ページ数9
ジャーナルIEICE Transactions on Electronics
E85-C
2
出版ステータスPublished - 2002 2

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

フィンガープリント

「Dynamic-storage-based logic-in-memory circuit and its application to a fine-grain pipelined system」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル