Dynamic Injection MNOS (DIMNOS) memory devices are proposed which feature high speed writing, 5 V drain voltage and a dynamic RAM with MNOS backup. These devices have one or two control gates and one MNOS memory between the control gates and field SiO2layer. In the above structures, the inversion layer under the MNOS gate is filled with charges transferred from the source through the control gates while writing voltage is being applied to MNOS gate. Then, the control gates are electrically closed and the stored charge in the inversion layer is injected into the interface between the thin SiO2and Si3N4layers in the MNOS. In the experimental results, N-channel Si-gate DIMNOS memory devices are written as fully as conventional MNOS memories in less than 50 nanoseconds. Furthermore, in the dynamic inhibited writing mode, writing is indeed inhibited with pulse widths shorter than 1.0 msec if the number of inhibited writing attempts is kept to less than 103by writing pulse shape improvement.
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