Dominant structural factors of local residual stress in three-dimensionally stacked LSI chips mounted using flip chip technology

Nobuki Ueta, Hideo Miura

研究成果: Conference contribution

15 被引用数 (Scopus)

抄録

Since mechanical stress and strain change both electronic functions and reliability of LSI chips, it has become strongly important to control the residual stress and strain in them to assure their reliable performance. In this study, the authors discuss the stress distribution in chips stacked using area-arrayed metallic bumps. The average residual stress in the stacked two chips changes drastically depending on the distance from a bending neutral axis of the stacked structure, and the local residual stress also varies depending on the relative position of bumps between an upper and a bottom interconnection layer. However, the residual stress of the top chip with a free surface is not affected by the bump alignment in lower interconnection layers. It is very important, therefore, to optimize the thickness of a chip and other structural factors as mentioned above to control not only the average residual stress but also the amplitude of the periodic stress. Finally, the estimated stress distribution in the stacked two chips was proved in detail by the experiment using stress-sensing chips with 2-μm long strain gauges consisted of single-crystalline Si.

本文言語English
ホスト出版物のタイトル2007 Proceedings of the ASME InterPack Conference, IPACK 2007
ページ473-479
ページ数7
DOI
出版ステータスPublished - 2007 12月 1
イベントASME Electronic and Photonics Packaging Division - Vancouver, BC, United States
継続期間: 2007 7月 82007 7月 12

出版物シリーズ

名前2007 Proceedings of the ASME InterPack Conference, IPACK 2007
2

Other

OtherASME Electronic and Photonics Packaging Division
国/地域United States
CityVancouver, BC
Period07/7/807/7/12

ASJC Scopus subject areas

  • コンピュータ ネットワークおよび通信
  • コンピュータ サイエンスの応用
  • 情報システム

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