抄録
Microcomputer system reliability using triple-modulare. dundancy (TMR) is discussed when failures exist not only in any singfe module but also in any two or three modules at a time. The optimaf time intervaf is calculated by which the system wilf even be desynchronized periodically so that additional transient faitures can be tolerated. It is shown that in spite of the optimal reaynchronisation, the reliability of the system cannot be improved by the ordinary TMR under some dependent-failures. For the purpose of eliminating the effect of dependent-failures, a new fault-tolerant microcomputer system is proposed where a program is executed three times by three CPU'S.
| 本文言語 | English |
|---|---|
| ページ（範囲） | 138-142 |
| ページ数 | 5 |
| ジャーナル | IEEE Journal of Solid-State Circuits |
| 巻 | 15 |
| 号 | 1 |
| DOI | |
| 出版ステータス | Published - 1980 2 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering