Three-dimensional(3-D) instrumentation based on optical flow is a promising instrumentation method for intelligent systems in which accurate 3-D information is required. However, real-time instrumentation is difficult since much computation time and a large memory bandwidth are required. In this paper, a 3-D instrumentation VLSI processor with a concurrent memory-access scheme is proposed. To reduce the access time, frequently used data are stored in a cache register array and are concurrently transferred to processing elements using simple interconnections to the 8-nearest neighbor registers. Based on a row and column memory access pattern, we propose a diagonally interleaved frame memory by which pixel values of a row and column are stored across memory modules. Therefore, the pixel values are read in parallel from the frame memory. Based on the concurrent memory-access scheme, the performance of the processor is 2 million times faster than that of a 28.5 MIPS workstation.
|出版ステータス||Published - 1997 12 1|
|イベント||Proceedings of the 1997 36th SICE Annual Conference - Tokushima, Jpn|
継続期間: 1997 7 29 → 1997 7 31
|Other||Proceedings of the 1997 36th SICE Annual Conference|
|Period||97/7/29 → 97/7/31|
ASJC Scopus subject areas
- コンピュータ サイエンスの応用