Design of a soft-error tolerant 9-transistor/6-magnetic-tunnel-junction hybrid cell based nonvolatile TCAM

Naoya Onizawa, Shoun Matsunaga, Takahiro Hanyu

研究成果: Conference contribution

2 被引用数 (Scopus)

抄録

This paper introduces a soft-error tolerant ternary content-addressable memory (TCAM) cell based on a transistor/magnetic-tunnel-junction (MTJ) hybrid structure. The MTJ device stores one-bit information as a resistance value and is often used for non-volatile memories. In the proposed nine-transistor (9T)/six-MTJ (6MTJ) cell, one-bit information is redundantly represented using three MTJs to mask a one-bit error per cell that might be occurred due to particle strikes. Thanks to the stackability of the MTJ device over a CMOS layer, there is no area overhead due to the redundancy compared to a conventional 9T-2MTJ cell. A 256-word 64-bit TCAM based on the proposed cell is designed under a 90nm CMOS/MTJ process and is evaluated using HSPICE simulation. The simulation results show that the proposed TCAM properly operates under a one-bit error per cell with comparable energy, area and a 14% delay overhead compared to the conventional TCAM. Compared to a CMOS-based TCAM with an error-correction code that masks a one-bit error per word, the proposed TCAM reduces the nubmer of transistors by 81% while masking a one-bit error per cell.

本文言語English
ホスト出版物のタイトル2014 IEEE 12th International New Circuits and Systems Conference, NEWCAS 2014
出版社Institute of Electrical and Electronics Engineers Inc.
ページ193-196
ページ数4
ISBN(電子版)9781479948857
DOI
出版ステータスPublished - 2014 1 1
イベント2014 12th IEEE International New Circuits and Systems Conference, NEWCAS 2014 - Trois-Rivieres, Canada
継続期間: 2014 6 222014 6 25

Other

Other2014 12th IEEE International New Circuits and Systems Conference, NEWCAS 2014
国/地域Canada
CityTrois-Rivieres
Period14/6/2214/6/25

ASJC Scopus subject areas

  • 電子工学および電気工学
  • 制御およびシステム工学
  • コンピュータ ネットワークおよび通信
  • ソフトウェア

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