Design and process integration for high-density, high-speed, and low-power 6F2 cross point MRAM cell

Y. Asao, T. Kajiyama, Y. Fukuzumi, M. Amano, H. Aikawa, T. Ueda, T. Kishi, S. Ikegawa, K. Tsuchida, Y. Iwata, A. Nitayama, K. Shimura, Y. Kato, S. Miura, N. Ishiwata, H. Hada, S. Tahara, H. Yoda

研究成果: Conference article査読

14 被引用数 (Scopus)

抄録

A new cross point (CP) cell with a hierarchical bit line architecture was proposed for magnetoresistive random access memory (MRAM) (1). The new CP cell has a potential high density of 6F2 and a faster access time than the conventional CP cell. A cell layout design to realize 6F2 is proposed and associated issues are resolved. Further, a 1Mb MRAM chip based on this structure has been fabricated utilizing 0.13 μm CMOS technology and 0.24×0.48 μm2 magnetic tunnel junction (MTJ) sandwiched with the most efficient yoke wires ever reported. The access time of 250 ns and 1.5 V operations are successfully demonstrated with the integrated 1Mb chip.

本文言語English
ページ(範囲)571-574
ページ数4
ジャーナルTechnical Digest - International Electron Devices Meeting, IEDM
出版ステータスPublished - 2004 12 1
イベントIEEE International Electron Devices Meeting, 2004 IEDM - San Francisco, CA, United States
継続期間: 2004 12 132004 12 15

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

フィンガープリント 「Design and process integration for high-density, high-speed, and low-power 6F<sup>2</sup> cross point MRAM cell」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル