Current-source-sharing differential-pair circuits for a low-power fine-grain reconfigurable VLSI architecture

Xu Bai, Michitaka Kameyama

研究成果: Conference contribution

7 被引用数 (Scopus)

抄録

A bit-serial reconfigurable VLSI using multiple-valued switch blocks and binary logic modules is proposed. In a cell, multiple-valued signaling is utilized to implement a compact switch block. Binary-controlled current steering technique is introduced utilizing a programmable series-gating differential-pair circuit to implement high-performance low-power arithmetic logic operations such as an arbitrary two-variable binary logic operation and a full-adder sum. Moreover, current-source sharing between a series-gating differential-pair circuit and a current-mode D-latch is proposed to reduce the current source count to reduce power consumption. As a result, the power consumption and the delay time of the proposed bit-serial cell are reduced to 63% and 72%, respectively, in comparison with those of a previous multiple-valued bit-serial cell.

本文言語English
ホスト出版物のタイトルProceedings - IEEE 42nd International Symposium on Multiple-Valued Logic, ISMVL 2012
ページ208-213
ページ数6
DOI
出版ステータスPublished - 2012
イベント42nd IEEE International Symposium on Multiple-Valued Logic, ISMVL 2012 - Victoria, BC, Canada
継続期間: 2012 5 142012 5 16

出版物シリーズ

名前Proceedings of The International Symposium on Multiple-Valued Logic
ISSN(印刷版)0195-623X

Other

Other42nd IEEE International Symposium on Multiple-Valued Logic, ISMVL 2012
国/地域Canada
CityVictoria, BC
Period12/5/1412/5/16

ASJC Scopus subject areas

  • コンピュータ サイエンス(全般)
  • 数学 (全般)

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