Consideration of microbump layout for reduction of local bending stress due to CTE Mismatch in 3D IC

Hisashi Kino, Hideto Hashiguchi, Seiya Tanikawa, Yohei Sugawara, Shunsuke Ikegaya, Takafumi Fukushima, Mitsumasa Koyanagi, Tetsu Tanaka

研究成果: Conference contribution

2 被引用数 (Scopus)

抄録

Three-dimensional IC (3D IC) has attracted much attention as a promising method to enhance IC performance. Recently, great interests in mechanical reliability are increasing among 3D IC researchers for production of 3D IC. Conventional 3D ICs consist of vertically stacked several thin IC chips those are electrically connected with lots of through-Si vias (TSVs) and metal microbumps. Metal microbumps are surrounded by organic adhesive called underfill material. In general, coefficient of thermal expansion (CTE) of the underfill material is larger than that of metal microbumps. This CTE difference induces local bending stress in thinned IC chips. This local bending stress would affect transistor reliability in thinned IC chips. Therefore, we should suppress the local bending stress to realize 3D IC with high reliability. In this work, we present design guideline of microbump layout which can suppress the local bending stress in 3D-stacked several thin IC chips.

本文言語English
ホスト出版物のタイトル2015 International 3D Systems Integration Conference, 3DIC 2015
出版社Institute of Electrical and Electronics Engineers Inc.
ページTS8.26.1-TS8.26.4
ISBN(電子版)9781467393850
DOI
出版ステータスPublished - 2015 11月 20
イベントInternational 3D Systems Integration Conference, 3DIC 2015 - Sendai, Japan
継続期間: 2015 8月 312015 9月 2

出版物シリーズ

名前2015 International 3D Systems Integration Conference, 3DIC 2015

Other

OtherInternational 3D Systems Integration Conference, 3DIC 2015
国/地域Japan
CitySendai
Period15/8/3115/9/2

ASJC Scopus subject areas

  • 電子工学および電気工学

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