Comparative study of tri-gate- and double-gate-type poly-Si fin-channel split-gate flash memories

Y. X. Liu, T. Kamei, T. Matsukawa, Kazuhiko Endo, S. O'uchi, J. Tsukada, H. Yamauchi, Y. Ishikawa, T. Hayashida, K. Sakamoto, A. Ogura, M. Masahara

研究成果: Conference contribution

抄録

The tri-gate (TG)- and double-gate (DG)-type poly-Si fin-channel split-gate flash memories with a thin n +-poly-Si floating-gate (FG) have successfully been fabricated, and their electrical characteristics including the variations of threshold voltage (Vt) and S-slope have been comparatively investigated. It was experimentally found that better short-channel effect (SCE) immunity, smaller V t variations, and a higher program speed are obtained in the TG-type flash memories than in the DG-type memories. Moreover, it was also confirmed that over-erase is effectively suppressed by split-gate structure.

本文言語English
ホスト出版物のタイトル2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012
DOI
出版ステータスPublished - 2012 10月 12
外部発表はい
イベント2012 17th IEEE Silicon Nanoelectronics Workshop, SNW 2012 - Honolulu, HI, United States
継続期間: 2012 6月 102012 6月 11

出版物シリーズ

名前2012 IEEE Silicon Nanoelectronics Workshop, SNW 2012

Other

Other2012 17th IEEE Silicon Nanoelectronics Workshop, SNW 2012
国/地域United States
CityHonolulu, HI
Period12/6/1012/6/11

ASJC Scopus subject areas

  • 電子工学および電気工学

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