抄録
We demonstrate for the first time CMOS integration of dual WF (work function) metal gates on HfSiON using Ni-phase controlled FUSI. The novel integration scheme that we demonstrate uses our optimized 2-step Ni FUSI process (1) for simultaneous full silicidation of nMOS and pMOS, achieving different Ni/Si ratios on nMOS and pMOS by reduction of the pMOS poly height through a selective and controlled poly etch back prior to gate silicidation. This novel integration scheme offers the advantages of 1) simplicity (same Ni deposition and silicidation process on nMOS and pMOS), 2) large process window for poly etch-back process (same pMOS characteristics for poly thickness variation of 50%), 3) WF and Vt tuning on HfSiON by phase control, with 4) scalable, linewidth independent suitable Vt's for nMOS (0.5 V) and pMOS (-0.3 V), and 5) solves process yield issues of Ni-rich silicides related to volume expansion, stress, filaments and voiding, resulting in a continuous silicide that is nicely confined between the sidewall spacers. Ring oscillator operation was also demonstrated.
本文言語 | English |
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ホスト出版物のタイトル | IEEE International Electron Devices Meeting, 2005 IEDM - Technical Digest |
ページ | 646-649 |
ページ数 | 4 |
出版ステータス | Published - 2005 |
外部発表 | はい |
イベント | IEEE International Electron Devices Meeting, 2005 IEDM - Washington, DC, MD, United States 継続期間: 2005 12月 5 → 2005 12月 7 |
出版物シリーズ
名前 | Technical Digest - International Electron Devices Meeting, IEDM |
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巻 | 2005 |
ISSN(印刷版) | 0163-1918 |
Other
Other | IEEE International Electron Devices Meeting, 2005 IEDM |
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国/地域 | United States |
City | Washington, DC, MD |
Period | 05/12/5 → 05/12/7 |
ASJC Scopus subject areas
- 電子材料、光学材料、および磁性材料
- 凝縮系物理学
- 電子工学および電気工学
- 材料化学