Bit Cost Scalable (BiCS) technology for future ultra high density memories

Akihiro Nitayama, Hideaki Aochi

研究成果: Conference contribution

10 被引用数 (Scopus)

抄録

We proposed Bit Cost Scalable (BiCS) technology in 2007 as a three-dimensional memory for the future ultra high density storage devices, which extremely reduce the bit costs by vertically stacking memory arrays with punch and plug process. We've applied it to just NAND flash, which is BiCS Flash memory, and established the mass production technology. Moreover, we can apply the BiCS technology to various memories. The critical issues and the comparison among various 3D NAND Flash-type memories are to be discussed, as well.

本文言語English
ホスト出版物のタイトル2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013
DOI
出版ステータスPublished - 2013 8 12
イベント2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013 - Hsinchu, Taiwan, Province of China
継続期間: 2013 4 222013 4 24

出版物シリーズ

名前2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013

Conference

Conference2013 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2013
国/地域Taiwan, Province of China
CityHsinchu
Period13/4/2213/4/24

ASJC Scopus subject areas

  • 電子工学および電気工学

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